Parallel port jtag adaptor

From Openjtag

Parellel port based jtag

although these where found to opperate too slow for debug usualy only 1Mhz clocking is posible

this section has been left for designs of jtag interfaces that can be used for programming and test that although too slow for debug offer a easy and cheep method to access the jtag ports on some chips

.... no designs entered at the moment feel free to add any .....

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